A Yield Study of VLSI Adders 1
نویسنده
چکیده
Several 64-bit adders have been designed and their ezpected yield has been estimated. OUT Tesults show that the yield of VLSI adders can be improved by modifying the layout of the ol.iginal design and/or by choosing a dzfferent layout and circuit structure. In certain situations, these approaches can improve the yield by 10% to 17%.
منابع مشابه
Techniques for Yield Enhancement of VLSI Adders 1
For VLSI application-speciic arrays and other regular VLSI circuits, two techniques are available for yield enhancement, namely defect-tolerance and layout modiications. In this paper, we compare these two yield enhancement approaches by using adders as an example. Our yield projections indicate that the layout modiication technique is more eecient when the defect density is low, while reconngu...
متن کاملTechniques for Yield Enhancement of VLSI Adders
For VLSI application-specific a m y s and other regular VLSI circuits, two techniques are available for yield enhancement, namely defect-tolerance and layout modifications. In this paper, we compare these two yield enhancement appruaches by using adders as an ezample. Our yield projections indicate that the layout modification technique is more eficient when the defect density is low, while rec...
متن کاملTechniques for Yield Enhancement of VLSI
For VLSI application-specific arrays and other regular VLSI circuits, two techniques are available for yield enhancement, namely defect-tolerance and layout modifications. In this paper, we compare these two yield enhancement approaches by using adders as an ezample. Our yield projections indicate that the layout modification technique ia more eficient when the defect density is low, while reco...
متن کاملof Pharmaceutical , Biological and Chemical Sciences Review on Performance of Adders for VLSI Applications
In this paper an extensive study on several adders has been manifested to design VLSI applications. Adder circuits plays a major role to modify or design a multiplier. Imprecise adder is one of the design where used in increasing the performance and power efficiency and approximate adders are for error detection and correction.16T full adders is also used to fast and energy efficient adder. An ...
متن کاملEnergy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders
In this paper, we motivate the concept of comparing VLSI adders based on their energy-delay trade-offs and present a technique for estimating the energy-delay space of various high-performance VLSI adder topologies. Further, we show that our estimates accurately represent tradeoffs in the energy-delay space for high-performance 32-bit and 64-bit processor adders in 0.13μm and 0.10μm CMOS techno...
متن کامل